The present invention generally relates to semiconductor devices, and more specifically relates to fabrication methods and resulting structures for inserted oxide FinFET devices.
The FinFET multi-gate transistor structure is widely used in 14/16 nm generation complementary metal-oxide-semiconductor (CMOS) technologies. To enable ultimate gate-length scaling, gate-all-around (GAA) field effect transistors (FET) have been developed. Although the GAA FET structure can provide superior electrostatics, it comes with process challenges such as forming spacers and filling gate metal between nanowires. Inserted-oxide fin field effect transistors (iFinFET) have been proposed to achieve a trade-off between process challenges and electrostatics.